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  fn6679 rev 3.00 page 1 of 13 october 12, 2015 fn6679 rev 3.00 october 12, 2015 isl22512 single push button controlled potentiometer (xdcp?) low noise, low power, 16 taps, push button controlled potentiometer datasheet the intersil isl22512 is a thr ee-terminal digitally-controlled potentiometer (xdcp) implem ented by a resistor array composed of 15 resistive ele ments and a wiper switching network. the isl22512 features a push button control, a shutdown mode, as well as an industry-leading tqfn package. the push button control has individual pu and pd inputs for adjusting the wiper. to elimin ate redundancy, the wiper position will automatically incre ment or decrement if one of these inputs is held l onger than one second. forcing both pu and pd low for more than two seconds activates shutdown mode. sh utdown mode disconnects the top of the resistor c hain and moves the wiper to the lowest position, minimizing power consumption. the three terminals a ccessing the resisto r chain naturally configure the isl22512 as a volt age divider. a rheostat is easily formed by floating an end t erminal or connecting it to the wiper. features ? solid-state non-volatile potentiometer ? push button controlled ? single or auto increment/decrement - fast mode after 1s button press ? autostore of last wiper positio n or manual store of wiper position ? shutdown mode ? 16 wiper tap points - middle scale wiper position on power-up ? low power cmos -v cc = 2.7v to 5.5v - terminal voltage, 0 to v cc - standby current, 3a max ?r total value = 10k ? ? high reliability - endurance: 1,000,000 data c hanges per bit per register - register data retention: 50 years @ t ? +55c ? packages - 8 ld soic - 10 ld tqfn (2.1mmx1.6mm) ? pb-free (rohs compliant) applications ? volume control ? led/lcd brightness control ? contrast control ? programming bias voltages ? ladder networks v cc (supply voltage) control block pu pd v ss (ground) rh rl rw 9 8 7 6 1 2 3 4 nc v ss ase rl v cc pu rh 5 10 pd o rw nc v cc ase pu pd rh v ss 1 2 3 4 8 7 6 5 rl rw o tqfn (top view) soic (top view) ase
isl22512 fn6679 rev 3.00 page 2 of 13 october 12, 2015 ordering information part number part marking r total (k ? ) temp. range(c) package (rohs compliant) pkg. dwg. # ISL22512WFB8Z* (note 1) 22512 wfbz 10 -40 to +125 8 ld soic m8.15 isl22512wfru10z-tk (note 2) (no longer available, recommended replacement: ISL22512WFB8Z-tk) ge 10 -40 to +125 10 ld tqfn tape and reel l10.2.1x1.6a *add -tk suffix for tape and reel. please refer to tb347 for details on reel specifications. note: 1. these intersil pb-free plasti c packaged products employ speci al pb-free material sets, molding compounds/die attach material s, and 100% matte tin plate plus anneal (e3 termination finish, which is ro hs compliant and compatible with both snpb and pb-free solderin g operations). intersil pb-free products are msl classified at pb-free peak re flow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 2. these intersil pb-free plasti c packaged products employ speci al pb-free material sets; molding compounds/die attach material s and nipdau plate - e4 termination finish, which is rohs compliant and com patible with both snpb and pb-free soldering operations. inters il pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j st d-020. pinouts isl22512 (8 ld soic) top view isl22512 (10 ld tqfn) top view v cc ase pu pd rh v ss 1 2 3 4 8 7 6 5 rl rw o 9 8 7 6 1 2 3 4 nc v ss ase rl v cc pu rh 5 10 pd o rw nc n o l o n g e r a v a i l a b l e or s u p p o r t e d pin descriptions soic pin tqfn pin symbol brief description 11pu the pu is a falling-edge triggered input with internal pull-up. toggl ing pu will move the wiper close to rh terminal. 22pd the pd is a falling-edge triggered input with internal pull-up. toggl ing pd will move the wiper close to rl terminal. 3 3 rh the rh and rl pins of the isl22512 are equivalent to the fixed terminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of rh and rl references the relative position of the terminal in rela tion to wiper movement directio n selected by the pu /pd input. 44v ss ground 5 6 rw the rw pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. 6 7 rl the rh and rl pins of the isl22512 are equivalent to the fixed terminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of rh and rl references the relative position of the terminal in rela tion to wiper movement directio n selected by the pu /pd input. 7 8 ase active low autostore enable i nput or manual store active low in put 89v cc supply voltage 5, 10 nc no connection
isl22512 fn6679 rev 3.00 page 3 of 13 october 12, 2015 block diagrams 4-bit up/down counter 4-bit nonvolatile memory store and recall control circuitry one of decoder resistor array rh pu pd transfer gates thirty rl control and memory pu pd v cc (supply voltage) v ss (ground) rh general detailed 0 1 2 28 29 30 31 two rl rw rw ase ase
isl22512 fn6679 rev 3.00 page 4 of 13 october 12, 2015 absolute maximum ratings thermal information storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage at pu and pd pin with respect to gnd . -0.3v to v cc + 0.3 v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to +6v voltage at any dcp pin with respect to gnd. . . . . . . . -0.3v to v cc i w (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6ma latchup . . . . . . . . . . . . . . . . . . . . . . . . . class ii, level a @ +125c esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300v thermal resistance (typical, notes 3, 4) ? ja (c/w) ? jc ( c / w ) 10 lead tqfn (notes 3, 4) . . . . . . . . 150 48.3 8 lead soic (note 3) . . . . . . . . . . . . . 125 n/a maximum junction temperat ure (plastic package). . . . . . . . +1 50c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp recommended operating conditions temperature range (extended industrial). . . . . . . .-40c to +125c v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7v to 5.5v power rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mw wiper current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0ma caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 3. ? ja is measured with the component mounted on a high effective the rmal conductivity test board in f ree air. see tech brief tb379 for details. 4. ? jc is for the location in the center of the exposed metal pad on the package underside. potentiometer specifications over recommended operating conditi ons, unless otherwise specifi ed. symbol parameter test conditions min (note 18) typ (note 5) max (note 18) unit r total rh to rl resistance 10 k ? rh to rl resistance tolerance -20 +20 % end-to-end temperature coefficient 80 ppm/c (note 16) r w wiper resistance v cc = 3.3v, wiper current i rw = v cc /r total 130 400 ? v rh , v rl v rh and v rl terminal voltages v rh and v rl to gnd 0 v cc v noise on wiper terminal from 0hz to 10mhz -80 dbv c h /c l /c w (note 17) potentiometer capacitance 10/10/25 pf i lkgdcp leakage on dcp pins voltage at pin from gnd to v cc 0.05 0.4 a voltage divider mode (0v @ r l ; v cc @ rh; measured at rw unloaded) inl (note 10) integral non-linearity -1 1 lsb (note 6) dnl (note 9) differential non-linearity monotonic over all tap positions -0.5 0 .5 lsb (note 6) zserror (note 7) zero-scale error 0 0.1 2 lsb (note 6) fserror (note 8) full-scale error -2 -0.1 0 lsb (note 6) tc v (note 11) ratiometric temperature coefficient wiper from 5 hex to 1f hex 2 5 ppm/c f cutoff 3db cut-off frequency wiper a t the middle scale 500 khz resistor mode (measurements between rw and rl with rh not connected, or between rw and rh with rl not connect ed) rinl (note 15) integral non-linearity dcp register set between 1 hex and 1f hex ; monotonic over all tap positions -1.5 1.5 mi (note 12) rdnl (note 14) differential non-linearity -0.5 0.5 mi (note 12) roffset (note 13) offset 012mi (note 12)
isl22512 fn6679 rev 3.00 page 5 of 13 october 12, 2015 dc electrical specifications over recommended operating conditio ns unless otherwise specified. symbol parameter test conditions min (note 18) typ (note 5) max (note 18) unit i cc v cc active current v cc = 5.5v, perform wiper move operation 150 a i cc v cc current during store operation v cc = 5.5v, perform non-volatile store operation 2ma i sb standby current 0.6 3 a i lkg pu , pd input leakage current v in = v ss to v cc -2 +2 a v ih pu , pd input high voltage v cc x 0.7 v v il pu , pd input low voltage v cc x 0.1 v c in (note 17) pu , pd input capacitance v cc = 3.3v, t a = +25c, f = 1mhz 10 pf rpull_up (note 17) pull-up resistor for pu and pd 1m ? eeprom specifications eeprom endurance 1,000,000 cycles eeprom retention temperature ??? 55c 50 years ac electrical specifications ov er recommended operating conditio ns unless otherwise specified. symbol parameter min (note 18) typ (note 5) max (note 18) unit t gap time between two separate push button events 2 ms t db debounce time 15 28 ms t s slow wiper change on a slow mode 100 250 390 ms t s fast wiper change on a fast mode 25 50 78 ms t stdn (note 17) time to enter shutdown mode (keep pu and pd low) 2 s t pu power-up to wiper stable 500 s t r vcc v cc power-up rate 0.2 50 v/ms notes: 5. typical values are for t a = +25c and 3.3v supply voltage. 6. lsb: [v(rw) 15 C v(rw) 0 ]/15. v(rw) 31 and v(rw) 0 are voltage on rw pin for the dcp register set to 0f hex and 0 0 hex respectively. lsb is the incremental voltage when changing from one tap to an adjace nt tap. 7. zs error = v(rw) 0 /lsb. 8. fs error = [v(rw) 31 C v cc ]/lsb. 9. dnl = [v(rw) i C v(rw) i-1 ]/lsb -1, for i = 1 to 15; i is the dcp register setting. 10. inl = [v(rw) i C i ? lsb C v(rw)]/lsb for i = 1 to 15 11. for i = 5 to 15 decimal, t = -40c to +125c. max( ) is the maximum value of the wiper voltage and min ( ) is the minimum value of the wiper voltage o ver the temperature range. 12. mi = | rw 15 C rw 0 | /15. mi is a minimum increment. rw 15 and rw 0 are the measured resistances for the dcp register set to 1f he x and 00 hex respectively. 13. roffset = rw 0 /mi, when measuring between rw and rl. roffset = rw 15 /mi, when measuring between rw and rh. 14. rdnl = (rw i C rw i-1 )/mi, for i = 1 to 15. 15. rinl = [rw i C (mi ? i) C rw 0 ]/mi, for i = 1 to 15. 16. for i = 5 to 15, t = -40c to +125c. max( ) is the maximum value of the resistance and min ( ) is the minimum value of the resistance over the temperature range. 17. limits should be considered ty pical and are not production t ested. 18. parts are 100% tested at +25c. temperature limits establish ed by characterization and are not production tested. tc v max v rw ?? i ?? min v rw ?? i ?? C max v rw ?? i ?? min v rw ?? i ?? + ?? 2 ? --------------------------------------------------------------- ------------------------------ - 10 6 +165c -------------------- - ? = ?? min ri ?? C ?? max ri ?? min ri ?? + ?? 2 ? --------------------------------------------------------------- - 10 6 +165c -------------------- - ? =
isl22512 fn6679 rev 3.00 page 6 of 13 october 12, 2015 slow mode timing fast mode timing shutdown mode timing autostore mode timing t gap t db mi * v w pu *mi in the ac timing diagram refe rs to the minimum incremental change in the wiper voltage. t db pu t s slow t s fast mi * 1s v w *mi in the ac timing diagram ref ers to the minimum incremental change in the wiper voltage. v w pu pd 2s t db shutdown mode wiper pu pd 250ms t db 20ms ase (high) (low) nn + 1 n + 2 position memory write cycle 2s
isl22512 fn6679 rev 3.00 page 7 of 13 october 12, 2015 typical performance curves figure 1. wiper resistance vs tap position [ i(rw) = v cc /r total ] for 10k ? (w) figure 2. standby i cc vs temperature figure 3. dnl vs tap position in voltage divider mode for 10k ? (w) figure 4. inl vs tap position in voltage divider mode for 10k ? (w) figure 5. zs error vs temperature figure 6. fs error vs temperature 0 20 40 60 80 100 120 140 160 tap position (decimal 0 3 6 9 12 15 +125 o c +25 o c -40 o c v cc = 5.5v wiper resistance ( ? ) 0 20 40 60 80 100 120 140 160 tap position (decimal 0 3 6 9 12 15 +125 o c +25 o c -40 o c v cc = 5.5v wiper resistance ( ? ) 0 0.5 1.0 1.5 2.0 2.5 3.0 -40 -15 10 35 60 85 110 temperature (c) i cc (a) v cc = 5v v cc = 2.7v -0.05 -0.03 -0.01 0.01 0.03 0.05 dnl (lsb) tap position (decimal 0 3 6 9 12 15 v cc = 5.5v v cc = 2.7v -0.10 -0.05 0.00 0.05 0.10 061215 tap position (decimal) inl (lsb) 39 v cc = 5.5v v cc = 2.7v 0 0.0005 0.0010 0.0015 0.0020 0.0025 0.0030 -40 -15 10 35 60 85 110 temperature (c) zero scale error (lsb) v cc = 5.5v v cc = 2.7v -1 -0.8 -0.6 -0.4 -0.2 0 -40 -15 10 35 60 85 110 temperature (c) full scale error (lsb) v cc = 5.5v v cc = 2.7v
isl22512 fn6679 rev 3.00 page 8 of 13 october 12, 2015 figure 7. dnl vs tap position in rheostat mode for 10k ? (w) figure 8. inl vs tap position in rheostat mode for 10k ? (w) figure 9. end to end r total % change vs temperature figure 10. tc for voltage divider mode in ppm figure 11. tc for rheostat mode in ppm figure 12. frequency respon se (500khz) typical performance curves (continued) -0.2 -0.1 0.0 0.1 0.2 0691215 tap position (decimal) v cc = 5.5v v cc = 2.7v 3 rdnl (lsb) -0.5 -0.3 -0.1 0.1 0.3 0.5 03691215 tap position (decimal) rinl (lsb) v cc = 5.5v v cc = 2.7v -1.2 -0.6 0.0 0.6 1.2 -40 -15 10 35 60 85 110 temperature (oc) r total change (%) v cc = 5.5v v cc = 2.7v 0 5 10 15 20 25 30 5 9 11 13 15 tap position (decimal) tcv (ppm/oc) 7 v cc = 5.5v v cc = 2.7v 0 50 100 150 200 250 300 tcr (ppm/oc) 5 9 11 13 15 tap position (decimal) 7 v cc = 5.5v v cc = 2.7v input sinewave 3db cut off = 500khz midscale output
isl22512 fn6679 rev 3.00 page 9 of 13 october 12, 2015 power-up and down requirements there are no restri ctions on the powe r-up or power-down conditions of v cc and the voltages applied to the potentiometer pin s provided that v cc is always more positive than or equal to v rh and v rl , i.e., v cc ? v rh, v rl . the v cc ramp rate specificatio n is always in effect. pin descriptions rh and rl the rh and rl pins of the isl22512 are equivalent to the fixed terminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of rh and rl references the relative position of the terminal in relation to wiper movement direction. rw the rw pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. pu the debounced pu input is used to increment the wiper position. an on-chip pull-up holds the pu input high. a switch closure to ground or a l ow logic level will, after a debounce time, move the wiper to the next adjacent higher tap position. pd the debounced pd input is used to decrement the wiper position. an on-chip pull-up holds the pd input high. a switch closure to ground or a l ow logic level will, after a debounce time, move the wiper to the next adjacent lower tap position. ase the debounced ase (autostore enable) pin can be in one of two states: 1. autostore is enabled if ase is held low during power-up. 2. autostore is disabled if ase is held high during power-up. a low to high transition will initiate a manual store operation. this is f or the user who wishes to connect a push button switch t o this pin. for every valid push, the isl22512 will store the current wiper position to the eeprom. device operation there are three sections of th e isl22512: the input control, counter and decode section; the eeprom memory; and the resistor array. the i nput control section operates just like an up/down counter. the output of t his counter is decoded to turn on a single electronic sw itch, connecting a point on the resistor array to the wiper output. under the proper conditions, the contents of t he counter can be stored in eeprom memory and retained for future use. the resistor array is comprised of 15 indivi dual resistors connected in series. at either end of the arra y and between e ach resistor is an electronic swit ch that transfers t he potential at that point to the wiper. the isl22512 is designed to int erface directly to two push button switches for effectively moving the wiper up or down. the pu and pd inputs increment or decrement a 4-bit counter respectively. the output of this counter is decoded to select one of the thirty-two wiper positions along the resistiv e array. the wiper increment input, pu and the wiper decrement input, pd are both connect ed to an internal pull-up so that they norma lly remain high. when pulled low by an external push button switch or a logic low level input, the wiper will be switched to the next adjacent tap position. internal debounce circuitry prevents inadvertent switching of the wiper position if pu or pd remain low for less than 15ms, typical. each of the buttons can be pu shed either once for a single in crement/decrement or continuously for a multiple increments/dec rements. the number of increments/decrements of the wiper position depends on how long the butt on is being pushed. when making a continuous push, after t he first second, the increment/decrement speed inc reases. for the first second, the device will be in the slow scan mode. then, if the button is held for longer than 1 second, the device will go into the fast scan mode. as soon as t he button is released, the isl22512 will return to a standby condition. if two or more buttons are pressed simultaneously, all commands are ignored upon rel ease of all buttons, except shutdown mode condition. the wiper, when at either fixe d terminal, act s like its mechanical equivalent and does not move bey ond the last position. that is, the counte r does not wrap around when clocked to either extreme. autostore the value of the coun ter is stored in eeprom memory after 2 seconds of no activity on pu or pd inputs while ase is enabled (held low). when power is restored, the content of the memory is recalled and th e counter resets to the last value stored. if autostore is to be implemented, ase is typically hard wired to v ss . if ase is held high during power-up and then taken low, the wiper will not respond to the pu or pd inputs until ase is brought high and held high. manual (push button) store when ase is not enabled (held high), a push button switch may be used to pull ase low for more than 15ms and released to perform a manual s tore of the wiper position. during memory write cycle al l inputs will be ignored.
isl22512 fn6679 rev 3.00 page 10 of 13 october 12, 2015 shutdown mode the isl22512 enters into shutdown mode if both pu and pd inputs are kept low for 2 second s. in this mode, the resistors array is totally disconnected f rom its rh pin and the wiper is moved to position closest to r l pin, as shown in figure 13. note, that pu and pd inputs must be pul led low within t db time window of 15ms, see shutdown mode timing on page 6. otherwise all command will be ignored till b oth inputs will be released. holding either pu , pd or ase input low for more than 15ms will exit shutdown mode and re turn wiper to prior shutdown position. if pu or pd will be held low fo r more than 250ms, the isl22512 will start auto-increment or auto-decrement of wiper position. r total with v cc removed the end- to-end resistance of the array will fluctuate once v cc is removed. rl rw rh figure 13. dcp connection in shutdown mode
fn6679 rev 3.00 page 11 of 13 october 12, 2015 isl22512 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2008-2015. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. about intersil intersil corporation is a leading provider of innovative power management and precision analog solutions. the company's produc ts address some of the largest marke ts within the industrial and i nfrastructure, mobile computing and high-end consumer markets. for the most updated datasheet, application no tes, related documentation and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggesti ons for improving this datashe et by visiting www.intersil.com/ask . reliability reports are also a vailable from our website at www.intersil.com/support . revision history the revision history provided is for informational purposes onl y and is believed to be accurate, but not warranted. please go to web to make sure you have the latest rev. date revision change 10/12/15 fn6679.3 updated the ordering information table on page 2 . added about intersil section. updated the package outline drawing m8.15 to the latest revisio n. changes are as follows: -updated to new pod format by removing table and moving dimensi ons onto drawing and adding land pattern. -changed in typical recommended land pattern the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) -changed note 1 1982 to 1994 07/06/09 fn6679.2 added reliability information on page 1 under f eatures and eeprom specifications in dc electrical spec table. changed tja for 8 ld soic from 120 to 125 added revision history 07/17/08 fn6679.1 1. removed u opti on specs from table as there i s no u option for this device. 2. updated pb-free note to new verbiage. 03/24/08 fn6679.0 initial release to web
isl22512 fn6679 rev 3.00 page 12 of 13 october 12, 2015 package outline drawing m8.15 8 lead narrow body small outline plastic package rev 4, 1/12 detail "a" top view index area 123 -c- seating plane x 45 notes: 1. dimensioning and tolerancing per ansi y14.5m-1994. 2. package length does not include mold flash, protrusions or ga te burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm ( 0.006 inch) per side. 3. package width does not include interlead flash or protrusions . interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 5. terminal numbers are s hown for reference only. 6. the lead width as measured 0.36m m (0.014 inch) or greater abo ve the seating plane, shall not exceed a maximum value of 0.61mm (0.02 4 inch). 7. controlling dimension: millimete r. converted inch dimensions a re not necessarily exact. 8. this outline conforms to je dec publication ms-012-aa issue c . side view a side view b 1.27 (0.050) 6.20 (0.244) 5.80 (0.228) 4.00 (0.157) 3.80 (0.150) 0.50 (0.20) 0.25 (0.01) 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 0.25(0.010) 0.10(0.004) 0.51(0.020) 0.33(0.013) 8 0 0.25 (0.010) 0.19 (0.008) 1.27 (0.050) 0.40 (0.016) 1.27 (0.050) 5.20(0.205) 1 2 3 4 5 6 7 8 typical recommended land pattern 2.20 (0.087) 0.60 (0.023)
isl22512 fn6679 rev 3.00 page 13 of 13 october 12, 2015 ultra thin quad flat no-lead plastic package (utqfn) 6 b e a d 0.10 c 2x 2 0.10 m c a b 0.05 m c (nd-1) x e c 0.05 c a 0.10 c a1 seating plane e index area pin #1 id 3 5 (datum a) (datum b) n-1 1 n nx l nx b 2 1 n top view bottom view side view nx (b) section "c-c" for odd terminal/side e cc 5 c l terminal tip (a1) l detail a pin 1 id l 0.05 min 0.10 min 0.10 c 2x 4xk b l10.2.1x1.6a 10 lead ultra thin quad flat no-lead plastic package symbol millimeters notes min nominal max a 0.45 0.50 0.55 - a1 - - 0.05 - a3 0.127 ref - b 0.15 0.20 0.25 5 d 2.05 2.10 2.15 - e 1.55 1.60 1.65 - e 0.50 bsc - k0.20 --- l 0.35 0.40 0.45 - n102 nd 4 3 ne 1 3 ? 0- 12 4 rev. 3 6/06 notes: 1. dimensioning and tolerancing conform to asme y14.5-1994. 2. n is the number of terminals. 3. nd and ne refer to the number of terminals on d and e side, respectively. 4. all dimensions are in mill imeters. angles are in degrees. 5. dimension b applies to the metallized terminal and is measure d between 0.15mm and 0.30mm from the terminal tip. 6. the configuration of the pin #1 identifier is optional, but m ust be located within the zone indicated. the pin #1 identifier may be either a mold or mark feature. 7. maximum package warpage is 0.05mm. 8. maximum allowable burrs is 0.076mm in all directions. 9. same as jedec mo-255uabd except: no lead-pull-back, "a" min dimension = 0.45 not 0.50mm "l" max dimension = 0.45 not 0.42mm. 10. for additional information, to assist with the pcb land patt ern design effort, see intersil technical brief tb389. 2.00 0.80 1.75 0.25 0.50 0.275 2.50 land pattern 10


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